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32-bit Single Cycle Microprocessor
Overview
Designed and implemented a 32-bit single-cycle microprocessor using Verilog HDL. The processor architecture includes instruction fetch, register file, arithmetic logic unit (ALU), control unit, data memory, and instruction memory. The design focuses on understanding processor architecture and FPGA-based digital system design.
Features
- 32-bit Architecture
- ALU Design
- Register File
- Instruction Memory
- Data Memory
- Control Unit
VerilogVivadoFPGAComputer Architecture
